x86 on ARM, why Rosetta 2 is so fast

Yoused

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A lot of the AS team came from or had prior experience at DEC, PA Semi, Intrinsity, etc., before anyone from Intel got there. So there was a lot of RISC expertise before Srouji showed up.
You worked on the 704 before going to AMD – how much do you mentally drag along from one to the other? Do you have to fight the urge to "this worked well on that μarch, so we should do similar kinds of stuff on this μarch", or is it easier to compartmentalize, shed old paradigms and adapt to the new environment?
 

Cmaier

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You worked on the 704 before going to AMD – how much do you mentally drag along from one to the other? Do you have to fight the urge to "this worked well on that μarch, so we should do similar kinds of stuff on this μarch", or is it easier to compartmentalize, shed old paradigms and adapt to the new environment?

it sort of depends. Some stuff I dragged along - things like the design methodology at Exponential was something that I started to implement at Sun (I won the “millennium falcon award” for that :) and when I went to AMD I eventually used it as the basis for what we built there. Things like block-partitioning with pin assignments, text-based cell placement, manual “synthesis” using a high level language that defined each gate and gate size directly, etc.

But I also went from being a bipolar circuit guy to having to do CMOS once I left Exponential. So I had to change the way I thought about a lot of things.

Going from RISC to CISC made very little difference to me. I had previously designed RISC data and instruction caches and RISC floating point, and then at Sun I designed a RISC scheduler and reservation stations, and at AMD I designed CISC integer ALUs, floating point ALUs, and a scheduler. Then I designed some of the AMD64 ISA. Etc. etc. Each time I was solving a problem and I just did it the way that seemed to make the most sense. Lessons learned on prior projects were useful, but it wasn’t like “for now on, every time I design a scheduler I‘m going to do it “Cliff-style.” The K8 scheduler had nothing much in common with the UltraSparc V, and the K6 ALUs had nothing in common with the K8 ALUs. Nor did the K8 floating point unit parrot what we did on the x704.

Once you change one thing (ISA, circuit class, ratio of metal-propagation-delay to gate-propagation-delay) you have to sort of rethink the whole thing.
 

Joelist

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Sorry I keep popping in and out erratically - work intervenes.

Srouji is not just the head of the Apple Silicon team he put it together in the first place. When it was formed in 2007 because Apple was highly unimpressed by the SoC capabilities they were using in the iPhone Bob Mansfield put Srouji on the task and let him build his own organization from the ground up. Then came the PA Semi purchase followed by Srouji's new team developing the A4, which while still using Cortex was otherwise in house. A5 was the last SoC to use Cortex and starting with A6 is where Apple Silicon was actually born (and also where performance skyrocketed).

It's actually a fascinating history and is part of why Apple is rather reluctant to let its Silicon be referred to as ARM - it uses an ARM ISA with extra goodies but outside of that it is a different animal.

Also, it is cool that there can actually be discussions like this here unlike "TOP" - by now we'd be awash in trolls.
 

KingOfPain

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But Intel Whatever Lake still beats Apple Silicon in a very essential chess benchmark and also has the added benefit that it can heat your whole house in winter!!!

Joking aside, I had to turn on heating in my office at home now, because the M1 MacBook Air just doesn't heat it as well as my old Mac Pro did.
What is a "disadvantage" in winter, has been a real blessing in summer. I don't have AC and with the summers getting hotter and hotter, I often didn't even want to turn on the Mac Pro, since the office already was pretty hot. The new MacBook Air cannot reduce the summer heat, of course, but at least it doesn't make it worse.
That is why I find the argument "I need maximum performance and don't care about the power draw!" so laughable.
 

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