M3 Enigma

Altaic

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So, today MR reported on references to unreleased chips on Apple's Tatsu Signing Server. This appears to actually have been discovered by MR user LeoI07 as described in this post, then later more ApChipIDs were discovered by twitter user _orangera1n running LeoI07's script.

Unsurprisingly, MR completely missed the only interesting part of the discovery. Here's a list of the ApChipIDs, their corresponding descriptions from this page on The Apple Wiki, and pretty obvious inferences:

Code:
0x6000    # M1 Pro
0x6001    # M1 Max
0x6002    # M1 Ultra

0x6020    # M2 Pro
0x6021    # M2 Max
0x6022    # M2 Ultra

0x6030    # M3 Pro *
0x6031    # M3 Max *
0x6032    # M3 Ultra *
0x6033    # <========== MYSTERY
0x6034    # <========== MYSTERY

0x6040    # M4 Pro *
0x6041    # M4 Max *
0x6042    # M4 Ultra *

0x6050    # M5 Pro *
0x6051    # M5 Max *
0x6052    # M5 Ultra *

0x8015    # A11 Bionic
0x8020    # A12 Bionic
0x8027    # A12X and A12Z Bionic
0x8030    # A13 Bionic

0x8101    # A14 Bionic
0x8103    # M1

0x8110    # A15 Bionic
0x8112    # M2

0x8120    # A16 Bionic
0x8122    # M3 *

0x8130    # A17 *
0x8132    # M4 *

0x8140    # A18 *
0x8142    # M5 *

0x8150    # A19 *

* inferred

My first thought was, "M3 Extreme and M3... Extremer?" Then I thought that maybe they're something related to the Vision Pro, but the R1 is allegedly 0x6500 (see link above). Going back to the "Extreme" chips, perhaps every third generation will include higher-powered chips? NB that I'm specifically not necessarily talking about 4 or 8 die packages.

So what do you think?
 
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dada_dave

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So, today MR reported on references to unreleased chips on Apple's Tatsu Signing Server. This appears to actually have been discovered by MR user LeoI07 as described in this post, then later more ApChipIDs were discovered by twitter user _orangera1n running LeoI07's script.

Unsurprisingly, MR completely missed the only interesting part of the discovery. Here's a list of the ApChipIDs, their corresponding descriptions from this page on The Apple Wiki, and pretty obvious inferences:

Code:
0x6000    # M1 Pro
0x6001    # M1 Max
0x6002    # M1 Ultra

0x6020    # M2 Pro
0x6021    # M2 Max
0x6022    # M2 Ultra

0x6030    # M3 Pro *
0x6031    # M3 Max *
0x6032    # M3 Ultra *
0x6033    # <========== MYSTERY
0x6034    # <========== MYSTERY

0x6040    # M4 Pro *
0x6041    # M4 Max *
0x6042    # M4 Ultra *

0x6050    # M5 Pro *
0x6051    # M5 Max *
0x6052    # M5 Ultra *

0x8015    # A11 Bionic
0x8020    # A12 Bionic
0x8027    # A12X and A12Z Bionic
0x8030    # A13 Bionic

0x8101    # A14 Bionic
0x8103    # M1

0x8110    # A15 Bionic
0x8112    # M2

0x8120    # A16 Bionic
0x8122    # M3 *

0x8130    # A17 *
0x8132    # M4 *

0x8140    # A18 *
0x8142    # M5 *

0x8150    # A19 *

* inferred

My first thought was, "M3 Extreme and M3... Extremer?" Then I thought that maybe they're something related to the Vision Pro, but the R1 is allegedly 0x6500 (see link above). Going back to the "Extreme" chips, perhaps every third generation will include higher-powered chips? NB that I'm specifically not necessarily talking about 4 or 8 die packages.

So what do you think?
Interesting … possible? But the rumor seemed to be pretty emphatic about no Extreme chip as in no special chip for the Mac Pro and there’s two chips to explain, not one. And they only show up for the M3. That’s definitely a head scratcher if it’s denoting something real.

Like back in the day I might’ve agreed that these are special iMac Pro and Mac Pro processors updated every three generations with only ultra variants of each getting updated every generation. But that just doesn’t feel super likely?
 

Altaic

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Interesting … possible? But the rumor seemed to be pretty emphatic about no Extreme chip as in no special chip for the Mac Pro and there’s two chips to explain, not one. And it only shows up for the M3. That’s definitely a head scratcher if it’s denoting something real.
Yeah, I’d also like to verify their findings myself, but I haven’t found the script used and haven’t had time to poke around that server yet. From what I’ve seen, they do seem to be legit “security analysts” though.

Edit: Okay, I found the (rather rudimentary) first version of the script. I’m going to rewrite it to be a bit more discreet, add some other functionality, and give that a shot tomorrow.

Also, there’s a lot of info on their discord server, particularly this thread. And, apparently, the R1 being 0x6500 is from this post on twitter.
 
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Altaic

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Before I turn in, just in case that server might be slated to be sealed up pronto, I ran a slightly modified version and indeed it checks out.
Code:
…
Invalid CPID: 0x6029
Invalid CPID: 0x6035
…
 
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B01L

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M3 Hyper Compute and M3 Hyper Vivid, blade-style chassis! Where’s @B01L when you need him? 😁

M3 Mac Cube confirmed...!

M3 Hyper Compute (four M3 Max SoCs) daughter card & M3 Hyper Vivid (four GPU-specific SoCs) daughter card on a SuperDuperUltraHighSpeed backplane...!

;^p
  • 64-core CPU (48P/16E)
  • 448-core GPU (w/hardware ray-tracing)
  • 128-core Neural Engine
  • 960GB ECC LPDDR5X RAM
  • 2.16TB/s UMA bandwidth
  • 32TB SSD (4 @ 8TB NAND blades)
 
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throAU

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M3 Mac Cube confirmed...!
㎥ cube you mean

  • 64-core CPU (48P/16E)
  • 448-core GPU (w/hardware ray-tracing)
  • 128-core Neural Engine
  • 960GB ECC LPDDR5X RAM
  • 2.16TB/s UMA bandwidth
  • 32TB SSD (4 @ 8TB NAND blades)

Thing is, apple /could/ surely build that if they were interested in that segment of the market. 2TB/s memory bandwidth and ~1TB of Ram are not out of the question in 2023 for a very high end machine.
 

theorist9

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M3 Mac Cube confirmed...!

M3 Hyper Compute (four M3 Max SoCs) daughter card & M3 Hyper Vivid (four GPU-specific SoCs) daughter card on a SuperDuperUltraHighSpeed backplane...!

;^p
  • 64-core CPU (48P/16E)
  • 448-core GPU (w/hardware ray-tracing)
  • 128-core Neural Engine
  • 960GB ECC LPDDR5X RAM
  • 2.16TB/s UMA bandwidth
  • 32TB SSD (4 @ 8TB NAND blades)
To be succeeded by the M4 "Klein Bottle" Mac, in which Apple extends the hardware into a hidden 4th dimension, giving new meaning to the word "proprietary".
iFixit, unable to access the extra dimension, assigns the M4 a repairability score of .
 
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Altaic

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Courtesy of dhinakg on the birdsite:

Code:
CPID:8122 BORD:22 J504AP    Mac15,3    MacBook Pro (14-inch, Nov 2023) [M3]
CPID:8122 BORD:28 J433AP    Mac15,4    iMac (24-inch, 2023) [M3]
CPID:8122 BORD:2A J434AP    Mac15,5    iMac (24-inch, 2023) [M3]
CPID:6030 BORD:04 J514sAP   Mac15,6    MacBook Pro (14-inch, Nov 2023) [M3 Pro]
CPID:6030 BORD:06 J516sAP   Mac15,7    MacBook Pro (16-inch, Nov 2023) [M3 Pro]
CPID:6031 BORD:44 J514cAP   Mac15,8    MacBook Pro (14-inch, Nov 2023) [M3 Max]
CPID:6031 BORD:46 J516cAP   Mac15,9    MacBook Pro (16-inch, Nov 2023) [M3 Max]
CPID:6034 BORD:44 J514mAP   Mac15,10   MacBook Pro (14-inch, Nov 2023) [M3 Max]
CPID:6034 BORD:46 J516mAP   Mac15,11   MacBook Pro (16-inch, Nov 2023) [M3 Max]

So, one of the mystery ApChipIDs/CPIDs is solved... Apparently, the two M3 Max SoCs (CPU/GPU cores: 14/30 and 16/40) are actually distinct parts as opposed to a binning (like the M3 Pro, for instance). Hopefully that doesn't extend in the same way to the Ultra.

P.S. I can't edit my original post to update it...
 

theorist9

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Courtesy of dhinakg on the birdsite:

Code:
CPID:8122 BORD:22 J504AP    Mac15,3    MacBook Pro (14-inch, Nov 2023) [M3]
CPID:8122 BORD:28 J433AP    Mac15,4    iMac (24-inch, 2023) [M3]
CPID:8122 BORD:2A J434AP    Mac15,5    iMac (24-inch, 2023) [M3]
CPID:6030 BORD:04 J514sAP   Mac15,6    MacBook Pro (14-inch, Nov 2023) [M3 Pro]
CPID:6030 BORD:06 J516sAP   Mac15,7    MacBook Pro (16-inch, Nov 2023) [M3 Pro]
CPID:6031 BORD:44 J514cAP   Mac15,8    MacBook Pro (14-inch, Nov 2023) [M3 Max]
CPID:6031 BORD:46 J516cAP   Mac15,9    MacBook Pro (16-inch, Nov 2023) [M3 Max]
CPID:6034 BORD:44 J514mAP   Mac15,10   MacBook Pro (14-inch, Nov 2023) [M3 Max]
CPID:6034 BORD:46 J516mAP   Mac15,11   MacBook Pro (16-inch, Nov 2023) [M3 Max]

So, one of the mystery ApChipIDs/CPIDs is solved... Apparently, the two M3 Max SoCs (CPU/GPU cores: 14/30 and 16/40) are actually distinct parts as opposed to a binning (like the M3 Pro, for instance). Hopefully that doesn't extend in the same way to the Ultra.

P.S. I can't edit my original post to update it...
Given that the model nos. seem to indicate an upward progression, it's curious that the Geekbench reports list the top-end (16-core) Max's as 15,8 and 15,9, rather than 15,10 and 15,11.
 

jido

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Given that Max is no longer an extended Pro, the Ultra (or whatever) might turn out to be something other than a linked pair of Maxes. It might serve them better to go with 24 (20P 4E) cores instead of 32.
What if the Ultra is its own chip, and there is an even more extreme option which links two Ultras together with a high-speed interposer?
 

Cmaier

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What if the Ultra is its own chip, and there is an even more extreme option which links two Ultras together with a high-speed interposer?
Not sure if they could make an M3 Ultra that matches M2 Ultra without using an interposed - the reticle size may be too small to allow a die big enough.
 

jido

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I don't expect the M3 Ultra to have as many cores as the M2 Ultra, just like the M3 Pro doesn't match the M2 Pro. Doubling everything is reserved for the highest tier in that fantasy world 😁
 

Cmaier

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I don't expect the M3 Ultra to have as many cores as the M2 Ultra, just like the M3 Pro doesn't match the M2 Pro. Doubling everything is reserved for the highest tier in that fantasy world 😁

I think it would come down to cache. Adding more cores without adding more cache would be counterproductive. Cache takes a lot of space. It’s possible they could get away with adding more cores without starving them, though, or that there is enough room on the reticle to add enough cache to compensate.
 

B01L

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I don't expect the M3 Ultra to have as many cores as the M2 Ultra, just like the M3 Pro doesn't match the M2 Pro. Doubling everything is reserved for the highest tier in that fantasy world 😁

M3 Ultra should have MORE cores than the M2 Ultra just as the M3 Max has more cores than the M2 Max; also, the M3 Ultra IS the "highest tier in that fantasy world"...

The Mn Ultra (as we know it so far) has been two Mn Max SoCs co-joined via the UltraFusion connector...

M1 Max
  • 10-core CPU (8P/2E)
  • 32-core GPU
M1 Ultra
  • 20-core CPU (16P/4E)
  • 64-core GPU
M2 Max
  • 12-core CPU (8P/4E)
  • 38-core GPU
M2 Ultra
  • 24-core CPU (16P/8E)
  • 72-core GPU
M3 Max
  • 16-core CPU (12P/4E)
  • 40-core GPU
M3 Ultra
  • 32-core CPU (24P/8E)
  • 80-core GPU
 
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